HD6433682 ETC, HD6433682 Datasheet - Page 249

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

Figure 13.40 shows an operation example in which GRA has been designated as an input capture
register, and buffer operation has been designated for GRA and GRC.
Counter clearing by input capture B has been set for TCNT, and falling edges have been selected
as the FIOCB pin input capture input edge. And both rising and falling edges have been selected
as the FIOCA pin input capture input edge.
As buffer operation has been set, when the TCNT value is stored in GRA upon the occurrence of
input capture A, the value previously stored in GRA is simultaneously transferred to GRC. The
transfer timing is shown in figure 13.41.
Compare match
Buffer transfer
TCNT
signal
signal
GRC
GRA
Figure 13.39 Example of Compare Match Timing for Buffer Operation
n
n
N
n+1
N
Rev. 3.00, 05/03, page 219 of 472