HD6433682 ETC, HD6433682 Datasheet - Page 329

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

17.4
The I
mode by setting FS in SAR.
17.4.1
Figure 17.3 shows the I
following a start condition always consists of 8 bits.
Legend
S:
SLA:
R/W:
A:
DATA: Transfer data
(a) I
(b) I
S
S
1
1
2
2
2
C bus format (FS = 0)
C bus format (Start condition retransmission, FS = 0)
C bus interface can communicate either in I
Start condition. The master device drives SDA from high to low while SCL is high.
Slave address
Indicates the direction of data transfer: from the slave device to the master device when
R/W is 1, or from the master device to the slave device when R/W is 0.
Acknowledge. The receive device drives SDA to low.
SDA
SCL
I
Operation
SLA
SLA
2
7
7
C Bus Format
S
1
1
R/
R/
1
1
SLA
1-7
2
C bus formats. Figure 17.4 shows the I
A
A
1
1
R/
8
DATA
DATA
n1
n
Figure 17.3 I
Figure 17.4 I
9
A
m1
A
1
A/
m
1
1-7
DATA
2
S
1
2
C Bus Formats
2
C Bus Timing
C bus mode or clocked synchronous serial
n1 and n2: Transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: Transfer frame count (m1 and m2
8
SLA
A/
1
7
A
9
P
1
1
2
R/
C bus timing. The first frame
1
Rev. 3.00, 05/03, page 299 of 472
1-7
m: Transfer frame count
n: Transfer bit count
DATA
A
(n = 1 to 8)
1
(m
8
1)
DATA
n2
9
A
m2
P
A/
1)
1
1
P