S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 1105

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
fault information will be recorded until the specific ECC fault flag has been cleared. In the event of
simultaneous ECC faults, the priority for fault recording is:
All FECCR bits are readable but not writable.
Freescale Semiconductor
Offset Module Base + 0x000E
Offset Module Base + 0x000F
Reset
Reset
1. Double bit fault over single bit fault
2. CPU over XGATE
W
W
R
R
0
0
7
7
ECCRIX[2:0]
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 28-21. Flash ECC Error Results Low Register (FECCRLO)
Figure 28-20. Flash ECC Error Results High Register (FECCRHI)
000
001
010
011
100
101
110
111
0
0
6
6
MC9S12XE-Family Reference Manual Rev. 1.25
Parity bits read from
Table 28-27. FECCR Index Settings
Flash block
Bits [15:8]
0
0
5
5
Not used, returns 0x0000 when read
Not used, returns 0x0000 when read
Data 1 [15:0] (P-Flash only)
Data 2 [15:0] (P-Flash only)
Data 3 [15:0] (P-Flash only)
FECCR Register Content
0
0
4
4
ECCR[15:8]
Global address [15:0]
ECCR[7:0]
CPU or XGATE
source identity
Data 0 [15:0]
Bit[7]
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
0
0
3
3
Global address
0
0
2
2
Bits[6:0]
[22:16]
0
0
1
1
0
0
0
0
1105

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