S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 392

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
Chapter 10 XGATE (S12XGATEV3)
ADDL
Operation
RD + $00:IMM8 ⇒ RD
Adds the content of register RD and an unsigned immediate 8 bit constant using binary addition and stores
the result in the destination register RD. This instruction must be used first for a 16 bit immediate addition
in conjunction with the ADDH instruction.
CCR Effects
Code and CPU Cycles
392
N:
Z:
V:
C:
ADDL RD, #IMM8
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise.
RD[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
Z
old
old
V
Source Form
& RD[15]
& RD[15]
C
new
new
MC9S12XE-Family Reference Manual Rev. 1.25
Add Immediate 8 bit Constant
Address
Mode
IMM8
1
(Low Byte)
1
1
0
0
Machine Code
RD
IMM8
Freescale Semiconductor
ADDL
Cycles
P

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