S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 829

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

23.4.11.1 Low-Voltage Interrupt (LVI)
In FPM, VREG_3V3 monitors the input voltage V
status bit LVDS is set to 1. On the other hand, LVDS is reset to 0 when V
interrupt, indicated by flag LVIF = 1, is triggered by any change of the status bit LVDS if interrupt enable
bit LVIE = 1.
23.4.11.2 HTI - High Temperature Interrupt
In FPM VREG monitors the die temperature T
HTDS is set to 1. Vice versa, HTDS is reset to 0 when T
by flag HTIF=1, is triggered by any change of the status bit HTDS if interrupt enable bit HTIE=1.
23.4.11.3 Autonomous Periodical Interrupt (API)
As soon as the configured timeout period of the API has elapsed, the APIF bit is set. An interrupt, indicated
by flag APIF = 1, is triggered if interrupt enable bit APIE = 1.
Freescale Semiconductor
On entering the Reduced Power Mode, the LVIF is not cleared by the
VREG_3V3.
On entering the Reduced Power Mode the HTIF is not cleared by the VREG.
Autonomous periodical interrupt (API)
High Temperature Interrupt (HTI)
Low-voltage interrupt (LVI)
Interrupt Source
MC9S12XE-Family Reference Manual Rev. 1.25
Table 23-13. Interrupt Vectors
DIE
NOTE
NOTE
. Whenever T
DDA
LVIE = 1; available only in Full Performance
available only in Full Performance Mode
. Whenever V
DIE
get below level T
Local Enable
DIE
APIE = 1
HTIE=1;
Chapter 23 Voltage Regulator (S12VREGL3V3V1)
Mode
exceeds level T
DDA
DDA
drops below level V
HTID
rises above level V
. An interrupt, indicated
HTIA
the status bit
LVIA,
LVID
the
. An
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