S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 474

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
11.3.2.2
The REFDV register provides a finer granularity for the IPLL multiplier steps.
Read: Anytime
Write: Anytime except when PLLSEL = 1
The REFFRQ[1:0] bit are used to configure the internal PLL filter for optimal stability and lock time. For
correct IPLL operation the REFFRQ[1:0] bits have to be selected according to the actual REFCLK
frequency as shown in
IPLL (no locking and/or insufficient stability).
11.3.2.3
The POSTDIV register controls the frequency ratio between the VCOCLK and PLLCLK. The count in the
final divider divides VCOCLK frequency by 1 or 2*POSTDIV. Note that if POSTDIV = $00 f
(divide by one).
474
Module Base + 0x0001
Reset
W
R
f REF
S12XECRG Reference Divider Register (REFDV)
S12XECRG Post Divider Register (POSTDIV)
0
7
=
REFFRQ[1:0]
Write to this register initializes the lock detector bit.
------------------------------------
(
REFDIV
f OSC
Figure 11-4. S12XECRG Reference Divider Register (REFDV)
Figure
0
6
+
1
Table 11-3. Reference Clock Frequency Selection
)
11-3. Setting the REFFRQ[1:0] bits wrong can result in a non functional
REFCLK Frequency Ranges
MC9S12XE-Family Reference Manual Rev. 1.25
1MHz <= f
6MHz < f
2MHz < f
0
5
f
REF
REF
REF
>12MHz
REF
<= 12MHz
<= 6MHz
<= 2MHz
NOTE
0
4
0
3
REFFRQ[1:0]
REFDIV[5:0]
00
01
10
11
0
2
Freescale Semiconductor
0
1
PLL
= f
0
0
VCO