S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 891

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 25
256 KByte Flash Module (S12XFTM256K2V1)
25.1
The FTM256K2 module implements the following:
Freescale Semiconductor
Revision
Number
V01.08
V01.09
V01.10
•
256 Kbytes of P-Flash (Program Flash) memory, consisting of 2 physical Flash blocks, intended
primarily for nonvolatile code storage
Introduction
14 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
25.4.2.8/25-933
25.4.2.5/25-930
25.3.2.1/25-903
25.4.2.4/25-930
25.4.2.7/25-932
25.3.2.1/25-903
25.4.1.2/25-922
25.5.2/25-951
25.4.2/25-927
25.4.2/25-927
25.3.1/25-896
25.3.2/25-901
25.4.2.12/25-
25.4.2.12/25-
25.4.2.12/25-
25.4.2.20/25-
25.1/25-891
25.6/25-951
Sections
Affected
936
936
936
945
MC9S12XE-Family Reference Manual Rev. 1.25
Table 25-1. Revision History
- Changed terminology from ‘word program’ to “Program P-Flash’ in the BDM
unsecuring description,
- Added requirement that user not write any Flash module register during
execution of commands ‘Erase All Blocks’,
Flash’,
- Added statement that security is released upon successful completion of
command ‘Erase All Blocks’,
- Corrected Error Handling table for Load Data Field command
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected P-Flash IFR Accessibility table
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Section 25.4.2.11
Section 25.5.2
Description of Changes
Section 25.4.2.8
Section
25.4.2.8, and ‘Unsecure
891