C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 151
![BOARD TARGET/PROTO W/C8051F930](/photos/9/25/92560/c8051f930-tb_sml.jpg)
C8051F930-TB
Manufacturer Part Number
C8051F930-TB
Description
BOARD TARGET/PROTO W/C8051F930
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F930-TB
Contents
Board
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F930
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1472
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13.5.2. PSWE Maintenance
13.5.3. System Clock
Additional Flash recommendations and example code can be found in “AN201: Writing to Flash from Firm-
ware," available from the Silicon Laboratories website.
7. Reduce the number of places in code where the PSWE bit (b0 in PSCTL) is set to a 1. There
8. Minimize the number of variable accesses while PSWE is set to a 1. Handle pointer address
9. Disable interrupts prior to setting PSWE to a 1 and leave them disabled until after PSWE has
10. Make certain that the Flash write and erase pointer variables are not located in XRAM. See
11. Add address bounds checking to the routines that write or erase Flash memory to ensure that
12. If operating from an external crystal, be advised that crystal performance is susceptible to
13. If operating from the external oscillator, switch to the internal oscillator during Flash write or
should be exactly one routine in code that sets PSWE to a 1 to write Flash bytes and one rou-
tine in code that sets both PSWE and PSEE both to a 1 to erase Flash pages.
updates and loop maintenance outside the "PSWE = 1;... PSWE = 0;" area. Code examples
showing this can be found in “AN201: Writing to Flash from Firmware," available from the Sili-
con Laboratories web site.
been reset to 0. Any interrupts posted during the Flash write or erase operation will be ser-
viced in priority order after the Flash operation has been completed and interrupts have been
re-enabled by software.
your compiler documentation for instructions regarding how to explicitly locate variables in dif-
ferent memory areas.
a routine called with an illegal address does not result in modification of the Flash.
electrical interference and is sensitive to layout and to changes in temperature. If the system is
operating in an electrically noisy environment, use the internal oscillator or use an external
CMOS clock.
erase operations. The external oscillator can continue to run, and the CPU can switch back to
the external oscillator after the Flash operation has completed.
Rev. 1.1
C8051F93x-C8051F92x
151
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