C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 155

BOARD TARGET/PROTO W/C8051F930

C8051F930-TB

Manufacturer Part Number
C8051F930-TB
Description
BOARD TARGET/PROTO W/C8051F930
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F930-TB

Contents
Board
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F930
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1472
SFR Definition 13.3. FLSCL: Flash Scale
SFR Page = 0x0; SFR Address = 0xB6
SFR Definition 13.4. FLWR: Flash Write Only
SFR Page = 0x0; SFR Address = 0xE5
Note: When changing the BYPASS bit from 1 to 0, the third opcode byte fetched from program memory is
Name
Reset
Name
Reset
Bit
5:0
Bit
7:0
Type
Type
7
6
Bit
Bit
indeterminate. Therefore, the operation which clears the BYPASS bit should be immediately followed by a
benign 3-byte instruction whose third byte is a don’t care. An example of such an instruction is a 3-byte MOV
that targets the FLWR register. When programming in ‘C’, the dummy value written to FLWR should be a non-
zero value to prevent the compiler from generating a 2-byte MOV instruction.
FLWR[7:0] Flash Write Only.
Reserved
Reserved
BYPASS
Name
Name
R
7
0
7
0
Reserved. Always Write to 0.
Flash Read Timing One-Shot Bypass.
0: The one-shot determines the Flash read time. This setting should be used for oper-
ating frequencies less than 10 MHz.
1: The system clock determines the Flash read time. This setting should be used for
frequencies greater than 10 MHz.
Reserved. Always Write to 000000.
All writes to this register have no effect on system operation.
BYPASS
R/W
6
0
6
0
R
5
0
5
0
Rev. 1.1
R
4
0
4
0
FLWR[7:0]
W
C8051F93x-C8051F92x
Function
Function
R
3
0
3
0
R
2
0
2
0
R
1
0
1
0
R
0
0
0
0
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