C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 97
![BOARD TARGET/PROTO W/C8051F930](/photos/9/25/92560/c8051f930-tb_sml.jpg)
C8051F930-TB
Manufacturer Part Number
C8051F930-TB
Description
BOARD TARGET/PROTO W/C8051F930
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F930-TB
Contents
Board
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F930
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1472
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7.6.
Comparator0 and Comparator1 on C8051F93x-C8051F92x devices have analog input multiplexers to con-
nect Port I/O pins and internal signals the comparator inputs; CP0+/CP0- are the positive and negative
input multiplexers for Comparator0 and CP1+/CP1- are the positive and negative input multiplexers for
Comparator1.
The comparator input multiplexers directly support capacitive touch switches. When the Capacitive Touch
Sense Compare input is selected on the positive or negative multiplexer, any Port I/O pin connected to the
other multiplexer can be directly connected to a capacitive touch switch with no additional external compo-
nents. The Capacitive Touch Sense Compare provides the appropriate reference level for detecting when
the capacitive touch switches have charged or discharged through the on-chip Rsense resistor. The Com-
parator outputs can be routed to Timer2 or Timer3 for capturing sense capacitor’s charge and discharge
time. See Section “25. Timers” on page 278 for details. See Application Note AN338 for details on Capaci-
tive Touch Switch sensing.
Any of the following may be selected as comparator inputs: Port I/O pins, Capacitive Touch Sense Com-
pare, VDD/DC+ Supply Voltage, Regulated Digital Supply Voltage (Output of VREG0), the VBAT Supply
voltage or ground. The Comparator’s supply voltage divided by 2 is also available as an input; the resistors
used to divide the voltage only draw current when this setting is selected. The Comparator input multiplex-
ers are configured using the CPT0MX and CPT1MX registers described in SFR Definition 7.5 and SFR
Definition 7.6.
Important Note About Comparator Input Configuration: Port pins selected as comparator inputs should
be configured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for
analog input, set to 0 the corresponding bit in register PnMDIN and disable the digital driver (PnMDOUT =
0 and Port Latch = 1). To force the Crossbar to skip a Port pin, set to 1 the corresponding bit in register
PnSKIP. See Section “21. Port Input/Output” on page 212 for more Port I/O configuration details.
VDD/DC+
VDD/DC+
Comparator0 and Comparator1 Analog Multiplexers
R
R
R
R
(1/3 or 2/3) x VDD/DC+
CPnOUT
VDD/DC+
R
P1.7*
P2.1*
P2.3*
P2.5*
P0.1
P0.3
P0.5
P0.7
P1.1
P1.3
P1.5
VBAT
½ x VDD/DC+
*P1.7-P2.5 only available as
Capacitive
inputs on 32-pin packages
Compare
Touch
Sense
Figure 7.4. CPn Multiplexer Block Diagram
CPn-
Input
MUX
CPnOUT
Rsense
Only enabled when
Capacitive Touch
Sense Compare is
selected on CPn+
Input MUX.
VDD/DC+
VDD/DC+
Rev. 1.1
R
R
R
R
(1/3 or 2/3) x VDD/DC+
CPnOUT
Digital Supply
C8051F93x-C8051F92x
R
P2.0*
P2.2*
P2.4*
P2.6*
P0.0
P0.2
P0.4
P0.6
P1.0
P1.2
P1.4
P1.6
½ x VDD/DC+
Capacitive
*P2.0-P2.6 only available as
Compare
GND
inputs on 32-pin packages
Touch
Sense
CPTnMX
CPn+
Input
MUX
CPnOUT
Rsense
Only enabled when
Capacitive Touch
Sense Compare is
selected on CPn-
Input MUX.
+
-
VDD/DC+
GND
97
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