C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 161
C8051F930-TB
Manufacturer Part Number
C8051F930-TB
Description
BOARD TARGET/PROTO W/C8051F930
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F930-TB
Contents
Board
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F930
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1472
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C8051F93x-C8051F92x
14.7. Determining the Event that Caused the Last Wakeup
When waking from idle mode, the CPU will vector to the interrupt which caused it to wake up. When
waking from stop mode, the RSTSRC register may be read to determine the cause of the last reset.
Upon exit from suspend or sleep mode, the wake-up flags in the PMU0CF register can be read to
determine the event which caused the device to wake up. After waking up, the wake-up flags will continue
to be updated if any of the wake-up events occur. Wake-up flags are always updated, even if they are not
enabled as wake-up sources.
All wake-up flags enabled as wake-up sources in PMU0CF must be cleared before the device can enter
suspend or sleep mode. After clearing the wake-up flags, each of the enabled wake-up events should be
checked in the individual peripherals to ensure that a wake-up event did not occur while the wake-up flags
were being cleared.
Rev. 1.1
161
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