C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 75
![BOARD TARGET/PROTO W/C8051F930](/photos/9/25/92560/c8051f930-tb_sml.jpg)
C8051F930-TB
Manufacturer Part Number
C8051F930-TB
Description
BOARD TARGET/PROTO W/C8051F930
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F930-TB
Contents
Board
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F930
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1472
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SFR Definition 5.4. ADC0PWR: ADC0 Burst Mode Power-Up Time
SFR Page = 0xF; SFR Address = 0xBA
Name Reserved
Reset
Type
Bit
6:4
3:0
7
Bit
AD0PWR[3:0]
Reserved
Unused
Name
R
7
0
Reserved.
Read = 0b; Must write 0b.
Unused.
Read = 0000b; Write = Don’t Care.
ADC0 Burst Mode Power-Up Time.
Sets the time delay required for ADC0 to power up from a low power state.
For BURSTEN = 0:
For BURSTEN = 1 and AD0EN = 1:
For BURSTEN = 1 and AD0EN = 0:
R
6
0
ADC0 power state controlled by AD0EN.
ADC0 remains enabled and does not enter a low power state after all conver-
sions are complete.
Conversions can begin immediately following the start-of-conversion signal.
ADC0 enters a low power state (as specified in Table 5.1) after all conversions
are complete.
Conversions can begin a programmed delay after the start-of-conversion sig-
nal.
The ADC0 Burst Mode Power-Up time is programmed according to the follow-
ing equation:
or
AD0PWR
Tstartup
R
5
0
=
=
Tstartup
---------------------- 1
AD0PWR
400ns
Rev. 1.1
R
4
0
–
+
1
C8051F93x-C8051F92x
400ns
Function
3
1
AD0PWR[3:0]
2
1
R/W
1
1
0
1
75
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