AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 1038

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AT32UC3C1512C Automotive

Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
33.7.40
Name:
Access Type:
Offset:
Reset Value:
This register can only be written if the WPSWS3 and WPHWS3 bits are cleared in
1028.
Only the first 20 bits (channel counter size) are significant.
• CPRD: Channel Period
If the waveform is left-aligned, then the output waveform period depends on the channel counter source clock and can be
calculated:
If the waveform is center-aligned, then the output waveform period depends on the channel counter source clock and can
be calculated:
9166C–AVR-08/11
– By using the PWM internal clock (CCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 128,
– By using the PWM internal clock (CCK) divided by one of both DIVA or DIVB divider, the formula becomes,
– By using the PWM internal clock (CCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 128,
31
23
15
7
-
256, 512, or 1024). The resulting period formula will be:
respectively:
256, 512, or 1024). The resulting period formula will be:
(
------------------------------ -
(
----------------------------------------- -
(
---------------------------------------- -
X CPRD
CRPD
2
×
Channel Period Register
×
CCK
X CPRD
CCK
CCK
×
×
DIVA
)
)
30
22
14
)
6
-
CPRD
Read/Write
0x20C + [ch_num * 0x20]
0x00000000
or
(
----------------------------------------- -
CRPD DIVB
CCK
×
29
21
13
5
-
)
28
20
12
4
-
CPRD
CPRD
CPRD
27
19
11
3
-
26
18
10
2
-
”Write Protect Status Register” on page
25
17
9
1
-
AT32UC3C
24
16
8
0
-
1038

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