AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 349

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AT32UC3C1512C Automotive

Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
19.5.2.1
Table 19-2.
Table 19-3.
Table 19-4.
Notes:
19.6
19.6.1
19.6.2
9166C–AVR-08/11
27
27
27
26
26
26
BA[1:0]
1. M0 is the byte address inside a 16-bit halfword.
Product Dependencies
25
25
25
BA[1:0]
BA[1:0]
I/O Lines
Power Management
16-bit memory data bus width
24
24
24
BA[1:0]
BA[1:0]
BA[1:0]
SDRAM Configuration Mapping: 2K Rows, 256/512/1024/2048 Columns
SDRAM Configuration Mapping: 4K Rows, 256/512/1024/2048 Columns
SDRAM Configuration Mapping: 8K Rows, 256/512/1024/2048 Columns
23
23
23
BA[1:0]
BA[1:0]
BA[1:0]
22
22
22
BA[1:0]
BA[1:0]
In order to use this module, other parts of the system must be configured correctly, as described
below.
The SDRAMC module signals pass through the External Bus Interface (EBI) module where they
are multiplexed. The user must first configure the I/O controller to assign the EBI pins corre-
sponding to SDRAMC signals to their peripheral function. If I/O lines of the EBI corresponding to
SDRAMC signals are not used by the application, they can be used for other purposes by the
I/O Controller.
The SDRAMC must be properly stopped before entering in reset mode, i.e., the user must issue
a Deep power mode command in the Mode (MD) register and wait for the command to be
completed.
21
21
21
BA[1:0]
20
20
20
19
19
19
Row[12:0]
Row[11:0]
18
18
18
Row[10:0]
Row[12:0]
Row[11:0]
17
17
17
Row[10:0]
Row[12:0]
Row[11:0]
16
16
16
Row[10:0]
Row[12:0]
Row[11:0]
15
15
15
CPU Address Line
CPU Address Line
CPU Address Line
Row[10:0]
14
14
14
13
13
13
12
12
12
11
11
11
10
10
10
9
9
9
8
8
8
7
7
7
Column[10:0]
Column[10:0]
Column[10:0]
Column[9:0]
Column[9:0]
Column[9:0]
6
6
6
Column[8:0]
Column[8:0]
Column[8:0]
Column[7:0]
Column[7:0]
Column[7:0]
5
5
5
4
4
4
AT32UC3C
3
3
3
2
2
2
1
1
1
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
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0
0

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