AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 617

• Manufacturer Part Number: AT32UC3C1512C Automotive
• Manufacturer: Atmel Corporation

Figure 25-52. Master Node with Peripheral DMA Controller (PDCM=0)
25.6.12.2
Figure 25-53. Slave Node with Peripheral DMA Controller
9166C–AVR-08/11
WRITE BUFFER
WRITE BUFFER
DATA 0
DATA N
DATA 1
DATA 0
DATA N
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Slave Node Configuration
Peripheral DMA
Peripheral DMA
Controller
Controller
In this configuration, the Peripheral DMA Controller transfers only the DATA. The Identifier must
be read by the user in the LIN Identifier register (LINIR). The LIN mode must be written by the
user in the LIN Mode register (LINMR).
The WRITE buffer contains the DATA if the USART sends the response (NACT=PUBLISH).
T h e R E A D b u f f e r c o n t a i n s t h e D A T A i f t h e U S A R T r e c e i v e s t h e r e s p o n s e
(NACT=SUBSCRIBE).
IMPORTANT: if the NACT configuration for a frame is PUBLISH, the US_LINMR register, must
be write with NACT=PUBLISH even if this field is already correctly configured, that in order to set
the TXREADY flag and the corresponding Peripheral DMA Controller write transfer request.
P eripheral
TXRDY
Peripheral
bus
RXRDY
bus
NODE ACTION = PUBLISH
CONTROLLER
USART LIN
CONTROLLER
USART LIN
READ BUFFER
READ BUFFER
DA TA 0
DATA N
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DATA 0
DATA N
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Peripheral DMA
Controller
Peripheral DMA
Controller
Peripheral
TXRDY
RXRDY
bus
P eripheral
RXRDY
Bus
AT32UC3C
NODE ACTION = SUBSCRIBE
CONTROLLER
NACT = SUBSCRIBE
USART LIN
CONTROLLER
USART LIN
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