AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 978

• Manufacturer Part Number: AT32UC3C1512C Automotive
• Manufacturer: Atmel Corporation

Table 33-2.
9166C–AVR-08/11
Period Value
(
Dead-Time Values
(
Duty-Cycle Values
(
Update Period Value
(
CPRDUPDx)
DTUPDx)
CDTYUPDx)
SCUPUPD)
Summary of the update of registers of Synchronous Channels
Update is triggered at the next
PWM period as soon as the
UPDULOCK bit is set to 1
33.6.2.10 on page
a comparison match (see
the SCM register.
Write by the CPU
Not applicable
Not applicable
UPDM=0
982). The user can choose to synchronize the PDCA transfer request with
Section 33.6.3 on page
the UPDULOCK bit is set to 1
the UPDULOCK bit is set to 1
next PWM period as soon as
next PWM period as soon as
Update is triggered at the
Update is triggered at the
Write by the CPU
Write by the CPU
Write by the CPU
UPDM=1
PWM period as soon as the update period
PWM period as soon as the update period
counter has reached the value UPR
counter has reached the value UPR
Update is triggered at the next
Update is triggered at the next
985), by the PTRM and PTRCS fields in
Write by the CPU
Write by the PDCA
AT32UC3C
UPDM=2
978