AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 148
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
- AT90CAN128_AUTOMOTIVE PDF datasheet
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #2
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
- Current page: 148 of 1312
- Download datasheet (20Mb)
9.6.8
Name:
Access Type:
Offset:
Reset Value:
• PERn: Periodic n
• ALARMn: Alarm n
• OVF: Overflow
9166C–AVR-08/11
31
23
15
7
-
-
-
-
When the SR.BUSY bit is set writes to this register will be discarded and this register will read as zero.
This register enables the wakeup signal from the AST.
0: The CPU will not wake up from sleep mode when the selected bit in the prescaler has a 0-to-1 transition.
1: The CPU will wake up from sleep mode when the selected bit in the prescaler has a 0-to-1 transition.
0: The CPU will not wake up from sleep mode when the counter reaches the selected alarm value.
1: The CPU will wake up from sleep mode when the counter reaches the selected alarm value.
0: A counter overflow will not wake up the CPU from sleep mode.
1: A counter overflow will wake up the CPU from sleep mode.
Wake Enable Register
30
22
14
6
-
-
-
-
WER
Read/Write
0x1C
0x00000000
29
21
13
5
-
-
-
-
28
20
12
4
-
-
-
-
27
19
11
3
-
-
-
-
26
18
10
2
-
-
-
-
ALARM1
PER1
25
17
9
1
-
-
AT32UC3C
ALARM0
PER0
OVF
24
16
8
0
-
148
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