AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 893

• Manufacturer Part Number: AT32UC3C1512C Automotive
• Manufacturer: Atmel Corporation

32.6.3.7
32.6.3.8
9166C–AVR-08/11
Remote wakeup
RAM management
Writing UHCON.SOFE to zero when in host mode will cause the USBC to cease sending SOF’s
on the USB bus and enter the Suspend state. The USB device will enter the Suspend state 3ms
later.
The device can awaken the host by sending an Upstream Resume (remote wakeup feature).
When the host detects a non-idle state on the USB bus, it sets the Host Wakeup interrupt bit
(UHINT.HWUPI). If the non-idle bus state corresponds to an Upstream Resume (K state), the
Upstream Resume Received Interrupt bit (UHINT.RXRSMI) is set and the user has to generate
a Downstream Resume within 1ms and for at least 20ms. It is required to first enter the Ready
state by writing a one to UHCON.SOFEF and then writing a one to the Send USB Resume bit
(UHCON.RESUME).
Pipe data can be physically allocated anywhere in the embedded RAM. The USBC controller
accesses the pipes directly through the HSB master (built-in DMA).
The USBC controller reads the USBC descriptors to know the location of each pipe. The base
address of this USBC descriptor (UDESC.UDESCA) needs to be written by the user. The
descriptors can also be allocated anywhere in the embedded RAM.
Before using a pipe, the user should setup the data address for each bank. Depending on the
direction, pipe type, targeted device address, targeted endpoint number, and packet-mode (sin-
gle or multi-packet), the user should also initialize the pipe packet size and the pipe control and
status field, so that the USB controller does not compute random values from the RAM.
When using a pipe, the user should read the UPSTAX.CURRBK field to know which bank is cur-
rently processed.
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