AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 353

• Manufacturer Part Number: AT32UC3C1512C Automotive
• Manufacturer: Atmel Corporation

Figure 19-5. Read Burst, 16-bit SDRAM Access
19.7.4
9166C–AVR-08/11
SDRAMC_A[12:0]
Border Management
D[15:0]
SDWE
(Input)
SDCS
SDCK
RAS
CAS
When the memory row boundary has been reached, an automatic page break is inserted. In this
case, the SDRAMC generates a precharge command, activates the new row and initiates a read
or write command. To comply with SDRAM timing parameters, an additional clock cycle is
inserted between the precharge and active (t
(t
RCD
) commands. This is described in
Row n
t
RCD
= 3
Col a
CAS = 2
Col b
Figure 19-6 on page
Dna
Col c
RP
Dnb
) commands and between the active and read
Col d
Dnc
Col e
354.
Dnd
Col f
Dne
AT32UC3C
Dnf
353