AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 50

• Manufacturer Part Number: AT32UC3C1512C Automotive
• Manufacturer: Atmel Corporation

7.3
Figure 7-1.
7.4
Table 7-1.
7.5
7.5.1
7.5.2
9166C–AVR-08/11
Name
RESET_N
Block Diagram
I/O Lines Description
Product Dependencies
Interrupt
Clock Implementation
External Reset Pin
PM Block Diagram
I/O Lines Description
Power-On
Detector
The PM interrupt line is connected to one of the internal sources of the interrupt controller. Using
the PM interrupt requires the interrupt controller to be programmed first.
In AT32UC3C, the HSB shares the source clock with the CPU. This means that writing to the
HSBSEL register has no effect. This register will always read the same value as CPUSEL.
The clock for the PM bus interface (CLK_PM) is generated by the Power Manager. This clock is
enabled at reset, and can be disabled in the Power Manager, whoever if disabled it can only be
re-enabled by a reset.
Main Clock Sources
Description
Reset
Reset Sources
Interrupts
Clock Generator
Reset Controller
Sleep Controller
Type
Input
Synchronous
Synchronous
CPU, HSB,
Instruction
Active Level
Low
Resets
clocks
Sleep
PBx
AT32UC3C
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