AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 307

• Manufacturer Part Number: AT32UC3C1512C Automotive
• Manufacturer: Atmel Corporation

18.5.1
18.5.2
18.6
18.6.1
Figure 18-2. SMC Connections to Static Memory Devices
18.6.2
9166C–AVR-08/11
Functional Description
I/O Lines
Clocks
Application Example
External Memory Mapping
Static Memory
Controller
NWR1/NBS1
NWR0/NWE
A0/NBS0
A2-A18
D0-D15
NCS0
NCS1
NCS2
NCS3
NCS4
NCS5
The SMC signals pass through the External Bus Interface (EBI) module where they are multi-
plexed. The user must first configure the I/O Controller to assign the EBI pins corresponding to
SMC signals to their peripheral function. If the I/O lines of the EBI corresponding to SMC signals
are not used by the application, they can be used for other purposes by the I/O Controller.
The clock for the SMC bus interface (CLK_SMC) is generated by the Power Manager. This clock
is enabled at reset, and can be disabled in the Power Manager. It is recommended to disable the
SMC before disabling the clock, to avoid freezing the SMC in an undefined state.
The SMC provides up to 24 address lines, A[23:0]. This allows each chip select line to address
up to 16Mbytes of memory.
If the physical memory device connected on one chip select is smaller than 16Mbytes, it wraps
around and appears to be repeated within this space. The SMC correctly handles any valid
access to the memory device within the page (see
A[23:0] is only significant for 8-bit memory, A[23:1] is used for 16-bit memory23.
NWR0/NWE
NRD
D0-D7
CS
OE
WE
D0-D7
128K x 8
SRAM
A0-A16
A2-A18
Figure 18-3 on page
NWR1/NBS1
D8-D15
NRD
CS
OE
WE
D0-D7
128K x 8
SRAM
A0-A16
308).
AT32UC3C
A2-A18
307