AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 331

• Manufacturer Part Number: AT32UC3C1512C Automotive
• Manufacturer: Atmel Corporation

18.6.7.3
Figure 18-27. NWAIT Assertion in Write Access: Ready Mode (MODE.EXNWMODE = 3).
9166C–AVR-08/11
In te rn a lly syn ch ro n iz e d
N W A IT sig n a l
A [A D _ M S B :2 ]
N B S 0 , N B S 1 ,
C L K _ S M C
A 0 , A 1
N W A IT
D [1 5 :0 ]
Ready mode
N C S
N W E
6
In Ready mode (MODE.EXNWMODE = 3), the SMC behaves differently. Normally, the SMC
begins the access by down counting the setup and pulse counters of the read/write controlling
signal. In the last cycle of the pulse phase, the resynchronized NWAIT signal is examined.
If asserted, the SMC suspends the access as shown in
18-28 on page
performed.
This mode must be selected when the external device uses deassertion of the NWAIT signal to
indicate its ability to complete the read or write operation.
If the NWAIT signal is deasserted before the end of the pulse, or asserted after the end of the
pulse of the controlling read/write signal, it has no impact on the access length as shown in
ure 18-28 on page
4
5
4
3
332. After deassertion, the access is completed: the hold step of the access is
332.
3
2
1
2
E X N W M O D E = 3 (R e a d y m o d e )
W R IT E M O D E = 1 (N W E _ co n tro lle d )
N W E P U L S E = 5
N C S W R P U L S E = 7
W rite cyc le
0
1
F R O Z E N S T A T E
0
1
Figure 18-27 on page 331
0
1
0
AT32UC3C
and
Figure
Fig-
331