MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 163

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.2.5
Read: Only when unlocked AND unsecured AND not armed AND TSOURCE set.
Write: Aligned word writes when disarmed unlock the trace buffer for reading but do not affect trace buffer
contents.
6.3.2.6
Read: Anytime
Write: Never
Freescale Semiconductor
Address: 0x0024, 0x0025
Address: 0x0026
Resets
Bit[15:0]
Other
Reset
POR
Field
15–0
POR
1. Currently defaults to Comparator A, Comparator B disabled
W
W
R
R
ABCM
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
11
—
15
X
Trace Buffer Data Bits — The Trace Buffer Register is a window through which the 20-bit wide data lines of the
Trace Buffer may be read 16 bits at a time. Each valid read of DBGTB increments an internal trace buffer pointer
which points to the next address to be read. When the ARM bit is set the trace buffer is locked to prevent reading.
The trace buffer can only be unlocked for reading by writing to DBGTB with an aligned word write when the
module is disarmed. The DBGTB register can be read only as an aligned word, any byte reads or misaligned
access of these registers return 0 and do not cause the trace buffer pointer to increment to the next trace buffer
address. Similarly reads while the debugger is armed or with the TSOURCE bit clear, return 0 and do not affect
the trace buffer pointer. The POR state is undefined. Other resets do not affect the trace buffer contents.
TBF
Debug Trace Buffer Register (DBGTBH:DBGTBL)
Debug Count Register (DBGCNT)
—
0
7
—
14
X
= Unimplemented or Reserved
13
—
X
—
0
0
6
Figure 6-7. Debug Trace Buffer Register (DBGTB)
—
12
X
Figure 6-8. Debug Count Register (DBGCNT)
Table 6-11. DBGTB Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
—
11
X
—
0
5
Table 6-10. ABCM Encoding
—
10
X
—
X
9
—
0
4
Bit 8
—
Description
X
Reserved
8
Description
Bit 7
—
X
7
(1)
—
0
3
Bit 6
—
X
6
CNT
Bit 5
—
X
5
—
0
2
Bit 4
—
X
4
S12S Debug Module (S12SDBGV2)
Bit 3
—
X
3
—
0
1
Bit 2
—
X
2
Bit 1
—
X
1
—
0
0
Bit 0
—
X
0
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