MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 391

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
11.4.6.4
If the data recovery logic does not detect a logic 1 where the stop bit should be in an incoming frame, it
sets the framing error flag, FE, in SCI status register 1 (SCISR1). A break character also sets the FE flag
because a break character has no stop bit. The FE flag is set at the same time that the RDRF flag is set.
11.4.6.5
A transmitting device may be operating at a baud rate below or above the receiver baud rate. Accumulated
bit time misalignment can cause one of the three stop bit data samples (RT8, RT9, and RT10) to fall outside
the actual stop bit. A noise error will occur if the RT8, RT9, and RT10 samples are not all the same logical
values. A framing error will occur if the receiver clock is misaligned in such a way that the majority of the
RT8, RT9, and RT10 stop bit samples are a logic zero.
Freescale Semiconductor
Figure
RT Clock Count
Reset RT Clock
RT Clock Count
Reset RT Clock
RT Clock
RT Clock
Samples
Samples
11-27, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
RXD
RXD
Framing Errors
Baud Rate Tolerance
1
1
1
1
1
1
1
1
1
1
Figure 11-26. Start Bit Search Example 5
1
Figure 11-27. Start Bit Search Example 6
1
S12P-Family Reference Manual, Rev. 1.13
1
1
1
1
1
1
0
0
0
0
0
1
Start Bit
0
Start Bit
1
1
0
0
0
No Start Bit Found
Serial Communication Interface (S12SCIV5)
1
0
0
0
0
0
0
LSB
LSB
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