MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 225

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3.2.16
The CPMUAPITR register configures the trimming of the API time-out period.
Read: Anytime
Write: Anytime
Freescale Semiconductor
0x02F3
APITR[5:0]
After de-assert of System Reset a value is automatically loaded from the Flash memory.
Reset
Field
7–2
W
R
APITR5
Autonomous Periodical Interrupt Period Trimming Bits — See
APITR[5:0] value represents a signed number influencing the ACLK period time.
Autonomous Periodical Interrupt Trimming Register (CPMUAPITR)
Figure 7-20. Autonomous Periodical Interrupt Trimming Register (CPMUAPITR)
F
7
APITR4
APITR[5]
APITR[4]
APITR[3]
APITR[2]
APITR[1]
APITR[0]
F
6
Bit
Table 7-16. CPMUAPITR Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
Table 7-17. Trimming Effect of APITR
Increases period
Decreases period less than APITR[5] increased it
Decreases period less than APITR[4]
Decreases period less than APITR[3]
Decreases period less than APITR[2]
Decreases period less than APITR[1]
APITR3
F
5
APITR2
F
4
Trimming Effect
Description
S12 Clock, Reset and Power Management Unit (S12CPMU)
APITR1
F
3
Table 7-17
APITR0
F
2
for trimming effects. The
0
0
1
0
0
0
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