MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 425

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 13
128 KByte Flash Module (S12FTMRC128K1V1)
13.1
The
The Flash memory is ideal for single-supply applications allowing for field reprogramming without
requiring external high voltage sources for program or erase operations. The Flash module includes a
memory controller that executes commands to modify Flash memory contents. The user interface to the
memory controller consists of the indexed Flash Common Command Object (FCCOB) register which is
written to with the command, global address, data, and any required command parameters. The memory
controller must complete the execution of a command before the FCCOB register can be written to with a
new command.
Freescale Semiconductor
Revision
Number
V01.09
V01.10
V01.11
•
•
FTMRC128K1
128
4
Kbytes of D-Flash (Data Flash) memory
Introduction
Kbytes of P-Flash (Program Flash) memory
19 Dec 2008
25 Sep 2009
28 Jul 2008
Revision
Date
module implements the following:
13.4.5.4/13-457
13.4.5.6/13-459
13.3.2.1/13-433
13.4.3.2/13-451
13.1.1/13-426
13.3.1/13-429
13.5.2/13-471
13.3.2/13-432
13.4.5.11/13-
13.4.5.11/13-
13.4.5.11/13-
13.1/13-425
13.6/13-472
Sections
Affected
463
463
463
S12P-Family Reference Manual, Rev. 1.13
Table 13-1. Revision History
- Remove reference to IFRON in Program IFR definition
- Remove reference to IFRON in
- Clarify single bit fault correction for P-Flash phrase
- Add statement concerning code runaway when executing Read Once,
Program Once, and Verify Backdoor Access Key commands from Flash block
containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Reformat section on unsecuring MCU using BDM
-The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
Table 13-4
and
Figure 13-3
425