MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 312

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MC9S12P32CFT

Manufacturer Part Number
MC9S12P32CFT
Description
MCU 16BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P32CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Package
48QFN EP
Family Name
HCS12
Maximum Speed
32 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/SCI/SPI
On-chip Adc
10-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Analog-to-Digital Converter (ADC12B10C)
312
ETRIGCH[3:0]
SMP_DIS
Field
3–0
4
1. Only if ETRIG3-0 input option is available (see device specification), else ETRISEL is ignored, that means
ETRIGSEL
external trigger source is still on one of the AD channels selected by ETRIGCH3-0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
Discharge Before Sampling Bit
0 No discharge before sampling.
1 The internal sample capacitor is discharged before sampling the channel. This adds 2 ATD clock cycles to
External Trigger Channel Select — These bits select one of the AD channels or one of the ETRIG3-0 inputs
as source for the external trigger. The coding is summarized in
the sampling time. This can help to detect an open circuit instead of measuring the previous sampled
channel.
ETRIGCH3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
Table 9-3. ATDCTL1 Field Descriptions (continued)
Table 9-5. External Trigger Channel Select Coding
SRES1
0
0
1
1
ETRIGCH2
S12P-Family Reference Manual, Rev. 1.13
Table 9-4. A/D Resolution Coding
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
SRES0
0
1
0
1
ETRIGCH1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
X
Description
ETRIGCH0
A/D Resolution
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
10-bit data
12-bit data
Reserved
8-bit data
Table
9-5.
External trigger source is
ETRIG0
Reserved
Reserved
ETRIG1
ETRIG2
ETRIG3
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN9
AN9
AN9
AN9
AN9
AN9
Freescale Semiconductor
(1)
1
1
1

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