MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 290

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MC9S12P32CFT

Manufacturer Part Number
MC9S12P32CFT
Description
MCU 16BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P32CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Package
48QFN EP
Family Name
HCS12
Maximum Speed
32 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/SCI/SPI
On-chip Adc
10-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale’s Scalable Controller Area Network (S12MSCANV3)
290
Extended Identifier
Standard Identifier
CAN 2.0A/B
CAN 2.0B
— a) the 14 most significant bits of the extended identifier plus the SRR and IDE bits of CAN 2.0B
— b) the 11 bits of the standard identifier, the RTR and IDE bits of CAN 2.0A/B messages.
Eight identifier acceptance filters, each to be applied to the first 8 bits of the identifier. This mode
implements eight independent filters for the first 8 bits of a CAN 2.0A/B compliant standard
identifier or a CAN 2.0B compliant extended identifier.
bank (CANIDAR0–CANIDAR3, CANIDMR0–CANIDMR3) produces filter 0 to 3 hits. Similarly,
the second filter bank (CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 4 to
7 hits.
Closed filter. No CAN message is copied into the foreground buffer RxFG, and the RXF flag is
never set.
messages or
Figure 8-41
CANIDMR0–3CANIDMR) produces filter 0 and 1 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 2 and 3 hits.
AM7
AC7
ID28
ID10
CANIDMR0
CANIDAR0
shows how the first 32-bit filter bank (CANIDAR0–CANIDA3,
IDR0
IDR0
Figure 8-40. 32-bit Maskable Identifier Acceptance Filter
AM0
ID21
AC0
ID3
S12P-Family Reference Manual, Rev. 1.13
AM7
AC7
ID20
ID2
CANIDMR1
CANIDAR1
IDR1
IDR1
ID Accepted (Filter 0 Hit)
IDE
AM0
ID15
AC0
AM7
AC7
ID14
ID10
Figure 8-42
CANIDMR2
CANIDAR2
IDR2
IDR2
shows how the first 32-bit filter
AM0
AC0
ID7
ID3
AM7
AC7
ID6
ID10
Freescale Semiconductor
CANIDMR3
CANIDAR3
IDR3
IDR3
AM0
AC0
RTR
ID3

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