MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 136

IC MPU 66MHZ COLDFIRE 196-MAPBGA

MCF5272VM66

Manufacturer Part Number
MCF5272VM66
Description
IC MPU 66MHZ COLDFIRE 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272VM66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Cpu Speed
66MHz
Embedded Interface Type
UART, QSPI, USB, TDM
Digital Ic Case Style
BGA
No. Of Pins
196
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

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Debug Support
5.5.2.1
The basic receive packet,
Table 5-15
5.5.2.2
The basic transmit packet,
Table 5-16
5-18
15–0
15–0
Bits
Bits
16
16
16
S
16
C
Name
Name
Data
Data
C
S
15
describes receive BDM packet fields.
describes transmit BDM packet fields.
15
Receive Packet Format
Transmit Packet Format
Control. This bit is reserved. Command and data transfers initiated by the development system should clear C.
Contains the data to be sent from the development system to the debug module.
Status. Indicates the status of CPU-generated messages listed below. The not-ready response can be ignored
unless a memory-referencing cycle is in progress. Otherwise, the debug module can accept a new serial
transfer after 32 processor clock periods.
S DataMessage
0 xxxxValid data transfer
0 0xFFFFStatus OK
1 0x0000Not ready with response; come again
1 0x0001Error—Terminated bus cycle; data invalid
1 0xFFFFIllegal command
Data. Contains the message to be sent from the debug module to the development system. The response
message is always a single word, with the data field encoded as shown above.
MCF5272 ColdFire
Figure
Figure
Table 5-16. Transmit BDM Packet Field Description
Table 5-15. Receive BDM Packet Field Description
5-13, consists of 16 data bits and 1 status bit.
5-14, consists of 16 data bits and 1 control bit.
Figure 5-14. Transmit BDM Packet
Figure 5-13. Receive BDM Packet
®
Integrated Microprocessor User’s Manual, Rev. 3
Data Field [15:0]
D[15:0]
Description
Description
Freescale Semiconductor
0
0

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