MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 94

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

ColdFire Core
ColdFire processors support a 1024-byte vector table aligned on any 1-Mbyte address boundary; see
Table
remaining 192 are user-defined interrupt vectors.
2-26
3. The processor saves the current context by creating an exception stack frame on the system stack.
4. The processor acquires the address of the first instruction of the exception handler. The exception
2-18. The table contains 256 exception vectors where the first 64 are defined by Freescale; the
ColdFire processors support a single stack pointer in the A7 address register; therefore, there is no
notion of separate supervisor and user stack pointers. As a result, the exception stack frame is
created at a 0-modulo-4 address on the top of the current system stack. Additionally, the processor
uses a simplified fixed-length stack frame for all exceptions. The exception type determines
whether the program counter in the exception stack frame defines the address of the faulting
instruction (fault) or of the next instruction to be executed (next).
vector table is aligned on a 1-Mbyte boundary. This instruction address is obtained by fetching a
value from the table at the address defined in the vector base register. The index into the exception
table is calculated as 4 x vector_number. When the index value is generated, the vector table
contents determine the address of the first instruction of the desired handler. After the fetch of the
first opcode of the handler is initiated, exception processing terminates and normal instruction
processing continues in the handler.
Numbers
Vector
16–23
25–31
32–47
48–60
6–7
10
11
12
13
14
15
24
0
1
2
3
4
5
8
9
MCF5272 ColdFire
Vector Offset
080–0BC
018–01C
040–05C
064–07C
0C0–0F0
(Hex)
00C
02C
03C
000
004
008
010
014
020
024
028
030
034
038
060
Table 2-18. Exception Vector Assignments
®
Program Counter
Integrated Microprocessor User’s Manual, Rev. 3
Stacked
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Next
Next
Next
Next
Next
Next
—
—
—
—
—
—
1
Initial stack pointer
Initial program counter
Access error
Address error
Illegal instruction
Divide by zero
Reserved
Privilege violation
Trace
Unimplemented line-a opcode
Unimplemented line-f opcode
Debug interrupt
Reserved
Format error
Uninitialized interrupt
Reserved
Spurious interrupt
Level 1–7 autovectored interrupts
Trap #0–15 instructions
Reserved
Assignment
Freescale Semiconductor