MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 6

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Figure
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5-29
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5-32
5-33
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5-41
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6-2
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6-11
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8-1
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vi
WRITE
WRITE
DUMP
FILL
GO
GO
NOP
NOP
RCREG
RCREG
WCREG
WCREG
RDMREG
WDMREG
WDMREG
Recommended BDM Connector ........................................................................................... 5-41
SIM Block Diagram ................................................................................................................. 6-1
Module Base Address Register (MBAR)................................................................................. 6-4
System Configuration Register (SCR) .................................................................................... 6-5
System Protection Register (SPR).......................................................................................... 6-6
Power Management Register (PMR) ...................................................................................... 6-7
Activate Low-Power Register (ALPR) ................................................................................... 6-10
Device Identification Register (DIR) ...................................................................................... 6-11
Watchdog Reset Reference Register (WRRR) ..................................................................... 6-12
Watchdog Interrupt Reference Register (WIRR)................................................................... 6-12
Watchdog Counter Register (WCR)...................................................................................... 6-13
Watchdog Event Register (WER).......................................................................................... 6-13
Interrupt Controller Block Diagram.......................................................................................... 7-2
Interrupt Control Register 1 (ICR1) ......................................................................................... 7-4
Interrupt Control Register 2 (ICR2) ......................................................................................... 7-5
Interrupt Control Register 3 (ICR3) ......................................................................................... 7-5
Interrupt Control Register 4(ICR4) .......................................................................................... 7-5
Interrupt Source Register (ISR)............................................................................................... 7-6
Programmable Interrupt Transition Register (PITR) ............................................................... 7-7
Programmable Interrupt Wakeup Register (PIWR)................................................................. 7-8
Programmable Interrupt Vector Register (PIVR)..................................................................... 7-9
Chip Select Base Registers (CSBRn) ..................................................................................... 8-3
SDRAM Controller Signals...................................................................................................... 9-2
54-Pin TSOP SDRAM Pin Definition....................................................................................... 9-3
SDRAM Configuration Register (SDCR)................................................................................. 9-6
DUMP
FILL
RDMREG BDM
Chip Select Option Registers (CSORn) ................................................................................. 8-5
Command Format............................................................................................................ 5-29
Command Sequence....................................................................................................... 5-29
Command Sequence...................................................................................................... 5-29
Command Format.......................................................................................................... 5-30
Command Sequence ..................................................................................................... 5-30
Command Format ......................................................................................................... 5-28
Command Sequence................................................................................................... 5-27
Command Format....................................................................................................... 5-25
Command Sequence .................................................................................................. 5-26
Command/Result Formats.......................................................................................... 5-27
Command/Result Formats......................................................................................... 5-30
Command Sequence ................................................................................................. 5-31
Command/Result Formats ........................................................................................ 5-31
Command Sequence ................................................................................................ 5-31
Command Sequence............................................................................................... 5-32
BDM Command Format.......................................................................................... 5-33
Command Sequence .............................................................................................. 5-33
MCF5272 ColdFire
Command/Result Formats .............................................................................. 5-32
List of Figures (Continued)
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Integrated Microprocessor User’s Manual, Rev. 3
Title
Freescale Semiconductor
Number
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