MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 380

IC MPU 66MHZ COLDFIRE 196-MAPBGA

MCF5272VM66

Manufacturer Part Number
MCF5272VM66
Description
IC MPU 66MHZ COLDFIRE 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272VM66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Cpu Speed
66MHz
Embedded Interface Type
UART, QSPI, USB, TDM
Digital Ic Case Style
BGA
No. Of Pins
196
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

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UART Modules
16.5.1.1
As
Note that when autobaud mode is enabled, the UFPDn, UDUn, and UDLn are automatically loaded with
the calculated baud rate. However, the calculated value can be overridden by a programmed value at any
time.
The choice of URT_CLK or CLKIN is programmed in the UCSR.
16.5.1.2
The following sections describe how to calculate baud rates.
16.5.1.2.1
When CLKIN is the UART clocking source, it goes through a divide-by-32 prescaler and then passes
through the 16-bit divider of the concatenated UDUn and UDLn registers. The UFPD register can be used
16-20
Figure 16-23
An external clock signal on the URT_CLK pin that can be divided by 16. When not divided,
URT_CLK provides a synchronous clock mode; when divided by 16, it is asynchronous.
CLKIN supplies an asynchronous clock source that is prescaled by 32 and then divided by the
16-bit value programmed in UDUn and UDLn. See
Registers
programmed in UFPDn.
Programmable Divider
Calculating Baud Rates
URT_CLK
URT_RxD
URT_TxD
CLKIN Baud Rates
CLKIN
shows, the UART transmitter and receiver can use the following clock sources:
(UDUn/UDLn).” The precision of this clock source can be tuned using the 4-bit value
MCF5272 ColdFire
Rx Buffer
Tx Buffer
Figure 16-23. Clocking Source Diagram
Tx
Rx
®
Integrated Microprocessor User’s Manual, Rev. 3
Clocking sources programmed in UCSR
Generator
Prescaler
Prescaler
Clock
x16
x1
UART
Section 16.3.11, “UART Divider Upper/Lower
(UFPD)
Divider
4-Bit
1-Bit Divider
(UDU, UDL)
Prescaler
16-Bit
Freescale Semiconductor

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