MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 276

IC MPU 66MHZ COLDFIRE 196-MAPBGA

MCF5272VM66

Manufacturer Part Number
MCF5272VM66
Description
IC MPU 66MHZ COLDFIRE 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272VM66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Cpu Speed
66MHz
Embedded Interface Type
UART, QSPI, USB, TDM
Digital Ic Case Style
BGA
No. Of Pins
196
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

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Universal Serial Bus (USB)
12-18
Bits
14
13
12
11
10
9
8
CFG_RAM_VAL
CMD_OVER
BUS_PWR
CMD_ERR
RESUME
USB_EN
AFE_EN
Name
MCF5272 ColdFire
Generates RESUME condition. Used to exit the SUSPEND state. The USB control logic ensures
the forced resume duration is greater than 10 ms. This command bit is write-only and always
returns 0 when read.
0 Default
1 Generate RESUME condition (force data lines to K state)
Note: this command generates a RESUME only if the USB is both suspended and enabled for
remote wakeup by the host, that is, USBEPSR0[WAKE_ST] = 1.
External USB analog front-end enable. Used to select the internal or external USB analog front
end (AFE). The internal AFE is selected by default.
0 The USB internal AFE is powered up and the external transceiver interface is disabled. The
1 The USB internal AFE is powered down and the external transceiver interface is enabled. The
Select bus-powered mode. Used to select between bus-powered and self-powered mode. This bit
only affects the response to a GET_STATUS device request. This bit should be set according to
the current configuration.
0 Self-powered mode
1 Bus-powered mode
Enables and disables the USB control logic. Has no effect on USB register values. When cleared,
the outputs are high impedance, preventing any response to the host. This bit should be set after
USB module registers are initialized and the descriptors are copied into the configuration RAM.
0 Disable USB module
1 Enable USB module
Enable USB configuration RAM. Notifies the USB module that the user has loaded the
configuration RAM. Must be set in order for the USB module to process the USB standard device
requests that access the configuration RAM. These requests are
SET
cause an access error.
0 Configuration RAM invalid
1 Configuration RAM valid
Command error for device request interface. Used to indicate to the endpoint controller that an
error has been encountered during class or vendor specific device request or SYNCH_FRAME
command processing. This command bit is write only and always returns 0 when read.
Result of RequestCMD_OVERCMD_ERR
Processed device request successfully10
Error processing the request11
Busy processing the request0X
Note: CMD_OVER and CMD_ERR have to be written simultaneously. The CMD_OVER and
CMD_ERR bits control the status stage response for vendor and class specific requests.
Command over for device request interface. Used to indicate to the endpoint controller that
processing of a class or vendor specific device request or SYNCH_FRAME command has been
completed by the user. This command bit is write only and always returns 0 when read.
Note: CMD_OVER and CMD_ERR have to be written simultaneously. The CMD_OVER and
CMD_ERR bits control the status stage response for vendor and class specific requests.
driven outputs can be observed on the parallel port A signals if they are configured for USB.
internal transceiver outputs, (USBH and USBL), are high impedance.
Table 12-12. EP0CTL Field Descriptions (continued)
_
CONFIGURATION
®
Integrated Microprocessor User’s Manual, Rev. 3
, and
SET
_
INTERFACE
. When this bit is set, accesses to the configuration RAM
Description
GET
_
DESCRIPTOR
Freescale Semiconductor
,

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