MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 408

IC MPU 66MHZ COLDFIRE 196-MAPBGA

MCF5272VM66

Manufacturer Part Number
MCF5272VM66
Description
IC MPU 66MHZ COLDFIRE 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272VM66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Cpu Speed
66MHz
Embedded Interface Type
UART, QSPI, USB, TDM
Digital Ic Case Style
BGA
No. Of Pins
196
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

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Pulse-Width Modulation (PWM) Module
Summary of the main features include:
18.2
The PWM is a simple free-running counter combined with a pulse-width register and a comparator such
that the output is cleared whenever the counter value exceeds the width register value. When the counter
overflows, or “wraps around,” its value becomes less than or equal to the value of the width register, and
the output is set. With a suitable low-pass filter, the PWM can be used as a digital-to-analog converter.
The width register is double-buffered so that a new value can be loaded for the next cycle without affecting
the current cycle. At the beginning of each period, the value of the width buffer register is loaded into the
width register, which feeds the comparator. This value is used for comparison during the next cycle. The
prescaler contains a variable divider that can reduce the incoming clock frequency by certain values
between 1 and 32768.
18.3
This section describes the registers and control bits in the PWM module. There are three independent
PWM modules, each with its own control and width registers. The memory map for the PWM is shown in
Table
18-2
0x00C0
0x00C4
0x00C8
0x00D0
0x00D4
0x00D8
MBAR
Offset
18-1.
Double-buffered width register
Variable-divide prescale
Three independent PWM modules
Byte-wide width register provides programmable duty cycle control
PWM Operation
PWM Programming Model
PWM Pulse-Width Register 0
PWM Pulse-Width Register 1
PWM Pulse-Width Register 2
PWM Control Register 0
PWM Control Register 1
PWM Control Register 2
(PWWD0)
(PWWD1)
(PWWD2)
(PWCR0)
(PWCR1)
(PWCR2)
[31:24]
MCF5272 ColdFire
Table 18-1. PWM Module Memory Map
®
Integrated Microprocessor User’s Manual, Rev. 3
[23:16]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
[15:8]
Freescale Semiconductor
[7:0]

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