HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 132

• Manufacturer Part Number: HFIXF1110CC.B3-998844
• Description: IC ETHERNET MAC 10PORT 552-CBGA
• Manufacturer: Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-4.2
• Voltage - Supply: 1.8 V, 2.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1010

IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
Table 74
Table 75
Table 76
Cortina Systems
RX Packet Filter Control ($ Port_Index + 0x19) (Sheet 2 of 2)
Port Multicast Address Low ($ Port_Index + 0x1A)
Port Multicast Address High ($ Port_Index + 0x1B)
®
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
2. Jumbo frames (1519 - 9600 bytes), matching the filter conditions, which would cause the frame to be
3. Frames are dropped only when the appropriate bits are set in the RX FIFO Errored Frame Drop Enable
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
31:16
Bit
31:0
15:0
2
1
0
Bit
Bit
dropped by the RX FIFO, will not be dropped. Instead, jumbo frames that are marked to be dropped by the
RX FIFO, based on the filter setting in this register, will still be sent across the SPI4-2 interface, but will be
marked as an EOP abort frame. Thus, jumbo frames matching the filter conditions will not be counted in
the RX FIFO Number of Frames Removed Register because they are not removed by the RX FIFO. Only
standard packet sizes (64 - 1518 bytes) meeting the filter conditions set in this register will actually be
dropped by the RX FIFO and counted in the RX FIFO Number of Frames Removed.
Register (
frames are sent across the SPI4-2 interface and marked as EOP abort frames.
B/Cast Drop En
M/Cast Match En
U/Cast Match En
Port Multicast
Address Low
Reserved
Port Multicast
Address High
RX FIFO Errored Frame Drop Enable ($ 0x59F)
Name
Name
Name
2
2
2
This bit enables a Global filter on Broadcast frames.
When B/CastDropEn = 0, all broadcast frames are
passed to the SPI4-2 Interface.
When B/CastDropEn = 1, all broadcast frames are
dropped.
This bit enables a filter on multicast frames. If this
bit = 0, all multicast frames are good and are passed
to the SPI4-2 Interface.
If this bit = 1, only multicast frames with a destination
address that matches the PortMulticastAddress is
forwarded. All other multicast frames are dropped.
This bit enables a filter on unicast frames.
If this bit = 0, all unicast frames are good and are
passed to the SPI4-2 interface.
If this bit = 1, only unicast frames with a destination
address that matches the Station Address is
forwarded. All other unicast frames are dropped.
Note:
This address is used to compare against
multicast frames at the receiving side if multicast
filtering is enabled.
This register contains bits 31:0 of the address.
Reserved
This address is used to compare against
multicast frames at the receiving side if Multicast
filtering is enabled.
This register contains bits 47:32 of the address.
The VLAN filter overrides the Unicast filter.
Thus, a VLAN frame cannot be filtered based
on the Unicast address.
3
Description
Description
Description
). When the appropriate bits are not set, the
3
3
Type
Type
R/W
R/W
Type
R
R/W
R/W
R/W
1
1
8.5 Memory Map
1
0x00000000
Default
Default
Default
0x0000
0x0000
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0
0
0