HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 59

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HFIXF1110CC.B3-998844

Manufacturer Part Number
HFIXF1110CC.B3-998844
Description
IC ETHERNET MAC 10PORT 552-CBGA
Manufacturer
Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

Controller Type
Ethernet Controller, MAC
Interface
SPI-4.2
Voltage - Supply
1.8 V, 2.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
575-BCBGA Exposed Pad (552 Bumps)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
1008-1010

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Manufacturer:
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Quantity:
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HFIXF1110CC.B3-998844
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HFIXF1110CC.B3-998844
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IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
5.2.1.3
Figure 12
Cortina Systems
DIP4
Figure 12
are computed. A functional description of calculating the DIP-4 code is given as follows.
Assume that the stream of 16-bit data words are arranged as shown in
the left most column, time moving downward). (The first word received is at the top of the
figure; the last word is at the bottom of the figure.) The parity bits are generated by
summing diagonally (in the control word, the space occupied by the DIP-4 code (bits a, b, c,
d) is set to all 1s during encoding). The first 16-bit result is split into two bytes, which are
added to each other modulo-2 to produce an 8-bit result. The 8-bit result is then divided into
two 4-bit nibbles, which are added to each other modulo-2 to produce the final DIP-4 code.
The procedure described applies to either parity generation on the Rx path or to check
parity on the Tx path.
DIP-4 Calculation Boundaries
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Payload
shows the range over which the Diagonal Interleaved Parity (DIP-4) parity bits
Control
Control
DIP-4 Codewords
Control
Payload
5.2 System Packet Interface Level 4
Figure 13
Control
A9039-01
(MSB at
Page 59
Phase 2

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