HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 57

• Manufacturer Part Number: HFIXF1110CC.B3-998844
• Description: IC ETHERNET MAC 10PORT 552-CBGA
• Manufacturer: Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-4.2
• Voltage - Supply: 1.8 V, 2.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1010

IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
Table 18
Table 19
Cortina Systems
Control Word Format (Continued) (Sheet 2 of 2)
Control Word Definitions
The SPI4-2 specification details all available Payload Control Words and should be used to
reference the specific meaning of each. The IXF1110 MAC supports all required functions
per this specification. However, there are various specifics in the way certain Control Words
affect the balance of the IXF1110 MAC operation, such as how the device deals with EOP
Aborts.
The SPI4-2 specification allows the EOP Abort Payload Control word, which signals that the
data associated with a particular frame is errored and should be dropped, or errored and
dropped by the far-end link partner. In the IXF1110 MAC, all TX SPI4-2 transfers that end
with an EOP Abort code have the TX SerDes CRC corrupted. This is true regardless of the
MAC configuration.
®
Bit Position
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
[15:12]
11:4
3:0
12
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
Bit
Idle
Reserved
Idle
Reserved
Idle
Reserved
Idle
Reserved
Valid
Valid/SOP
Valid
Valid/SOP
Valid
Valid
Valid
Valid
Label
DIP-4
SOP
ADR
Status
Word
Next
Start-of-Packet.
Set to 1 if the payload transfer immediately following the control word corresponds to
the start of a packet. Set to 0 otherwise.
Set to 0 in all idle and training control words
Port Address.
8-bit port address of the payload data transfer immediately following the control word.
None of the addresses are reserved (all are available for payload transfer).
Set to all zeroes in all idle control words
Set to all ones in all training control words
4-bit Diagonal Interleaved Parity.
4-bit odd parity computed over the current control word and the immediately preceding
data words (if any) following the last control word
Continued
Reserved
EOP w/abort
Reserved
EOP w/ 2 bytes
Reserved
EOP w/ 1 byte
Reserved
None
EOP w/abort
EOP w/abort
EOP w/ 1 byte
None
EOP w/ 2 bytes
EOP w/ 2 bytes
EOP w/ 1 byte
Prior Word Status
Reserved
Idle, not EOP, training control word
Reserved
Idle, Abort last packet
Idle, EOP with 2 bytes valid
Reserved
Idle, EOP with 1byte valid
Reserved
Valid, no SOP, no EOP
Valid, SOP, no EOP
Valid, no SOP, abort
Valid, SOP, abort
Valid, no SOP, EOP with 2 bytes valid
Valid, SOP, EOP with 2 bytes valid
Valid, no SOP, EOP with 1byte valid
Valid, SOP, EOP with 1byte valid
Description
5.2 System Packet Interface Level 4
Meaning
Page 57
Phase 2