HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 9

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HFIXF1110CC.B3-998844

Manufacturer Part Number
HFIXF1110CC.B3-998844
Description
IC ETHERNET MAC 10PORT 552-CBGA
Manufacturer
Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

Controller Type
Ethernet Controller, MAC
Interface
SPI-4.2
Voltage - Supply
1.8 V, 2.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
575-BCBGA Exposed Pad (552 Bumps)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
1008-1010

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HFIXF1110CC.B3-998844
Manufacturer:
Cortina Systems Inc
Quantity:
135
Part Number:
HFIXF1110CC.B3-998844
Manufacturer:
Cypress
Quantity:
106
Part Number:
HFIXF1110CC.B3-998844
Manufacturer:
Cortina Systems Inc
Quantity:
10 000
IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
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Cortina Systems
MAC Control Register Map.......................................................................................................... 118
MAC RX Statistics Register Map................................................................................................. 119
MAC TX Statistics Register Map ................................................................................................. 120
Global Status and Configuration Register Map ........................................................................... 121
RX Block Register Map ............................................................................................................... 121
TX Block Register Map................................................................................................................ 122
SPI4-2 Block Register Map ......................................................................................................... 124
SerDes Block Register Map ........................................................................................................ 124
Optical Module Interface Block Register Map ............................................................................. 124
Station Address Low ($ Port_Index + 0x00)................................................................................ 125
Station Address High ($ Port_Index + 0x01) ............................................................................... 125
FDFC Type ($ Port_Index + 0x03) .............................................................................................. 125
FC TX Timer Value ($ Port_Index + 0x07) .................................................................................. 125
FDFC Address Low ($ Port_Index + 0x08) ................................................................................. 126
FDFC Address High ($ Port_Index + 0x09)................................................................................. 126
IPG Transmit Time ($ Port_Index + 0x0C) .................................................................................. 126
Pause Threshold ($ Port_Index + 0x0E) ..................................................................................... 127
Max Frame Size ($ Port_Index + 0x0F) ...................................................................................... 127
FC Enable ($ Port_Index + 0x12)................................................................................................ 127
Discard Unknown Control Frame ($ Port_Index + 0x15)............................................................. 128
RX Config Word ($ Port_Index + 0x16)....................................................................................... 128
TX Config Word ($ Port_Index + 0x17) ....................................................................................... 129
Diverse Config ($ Port_Index + 0x18) ......................................................................................... 129
RX Packet Filter Control ($ Port_Index + 0x19) .......................................................................... 131
Port Multicast Address Low ($ Port_Index + 0x1A)..................................................................... 132
Port Multicast Address High ($ Port_Index + 0x1B) .................................................................... 132
MAC RX Statistics ($ Port_Index + 0x20 - Port_Index + 0x39) ................................................... 133
MAC TX Statistics ($ Port_Index + 0x40 - Port_Index + 0x58) ................................................... 137
Port Enable ($ 0x500).................................................................................................................. 140
Link LED Enable ($ 0x502).......................................................................................................... 141
Core Clock Soft Reset ($ 0x504)................................................................................................. 141
MAC Soft Reset ($ 0x505)........................................................................................................... 142
CPU Interface ($ 0x508).............................................................................................................. 142
LED Control ($ 0x509)................................................................................................................. 143
LED Flash Rate ($ 0x50A)........................................................................................................... 143
LED Fault Disable ($ 0x50B) ....................................................................................................... 143
JTAG ID Revision ($ 0x50C) ....................................................................................................... 144
RX FIFO High Watermark Ports 0 to 9 ($ 0x580 - 0x589)........................................................... 145
RX FIFO Low Watermark Ports 0 to 9 ($ 0x58A - 0x593) ........................................................... 146
RX FIFO Number of Frames Removed Ports 0 to 9 ($ 0x594 - 0x59D)...................................... 147
RX FIFO Port Reset ($ 0x59E).................................................................................................... 149
RX FIFO Errored Frame Drop Enable ($ 0x59F)......................................................................... 150
RX FIFO Overflow Event ($ 0x5A0) ............................................................................................ 152
TX FIFO High Watermark Ports 0 to 9 ($ 0x600 - 0x609) ........................................................... 153
TX FIFO Low Watermark Ports 0 to 9 ($ 0x60A - 0x613)............................................................ 155
TX FIFO MAC Transfer Threshold Ports 0 to 9 ($ 0x614 - 0x61D) ............................................. 157
TX FIFO Overflow Event ($ 0x61E)............................................................................................. 159
TX FIFO Drain ($0x620) .............................................................................................................. 160
TX FIFO Info Out-of-Sequence ($ 0x621) ................................................................................... 161
TX FIFO Number of Frames Removed Ports 0-9 ($ 0x622 - 0x62B) .......................................... 162
SPI4-2 RX Burst Size ($ 0x700) .................................................................................................. 162
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Page 9
Tables

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