HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 74

• Manufacturer Part Number: HFIXF1110CC.B3-998844
• Description: IC ETHERNET MAC 10PORT 552-CBGA
• Manufacturer: Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-4.2
• Voltage - Supply: 1.8 V, 2.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1010

IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
5.4.4.1.1
Cortina Systems
The I
The 4-bit Device ID field defaults to Ah, this value is compatible with standard fiber module
based on the Atmel Serial E
will require to update this field with the appropriate value.
The 11-bit Register Address is split into two sub-fields:
Initiating an access where the 4-bit Port Address field to a value > 9h will not generate an
I
Initiating a write access where the Device ID field = Ah and the Register Address[10:8] = 0h
will generate an I
write has been initiated to the write protected optical module.
Read Access Operation Example
The following sequence provides an example of reading the data stored in the Optical
Module Register 0x000 for Port 5:
All other bits in this register should be written with the value ‘0’.
This data is written into the I
®
2
1. Program the
2. When this register is written and the I
C access. Instead the Port Address Error will be set.
• I
• I
• Write Access Complete bit
• Read DataValid bit
• 4-bit Port Address Select
• Read/Write access select
• 4-bit Device ID
• 11-bit Register Address
• 8-bit Write Data
• 8-bit Read Data
• Bits [10:8] must be set to 0h to be compatible with standard fiber optical module.
• Bits [7:0] specify the particular location to be accessed within the device specified by
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Alternatively these bits can be set to 1h - 7h to permit access to seven other I
component on the same bus.
the Device ID field and Register Address[10:8].
information:
a. Enable I
b. Set the port to be accessed by setting bits [19:16] to 0x5.
c. Select a READ access by setting bit 15 to ‘1’.
d. Set the Device ID, bits [14:11] to be 0xA (Atmel compatible).
e. Set the 11-bit Register Address, bits [10:0] to 0x000.
f.
machine examines the Port Address Select and enables the I
the selected port.
2
2
2
C Enable bit
C Start Access bit
C Data Register is divided into the following sections:
Initiate the I
2
2
I
C Block by setting bit 25 to ‘1’.
2
C access. In addition the Write Protect Error bit will be set to indicate a
C Control Ports 0-9 ($ 0x79B), on page 167
2
C transfer by setting bit 24 to ‘1’.
2
2
Prom family. I
C Control Register in a single cycle via the CPU interface.
2
C Start bit is at a Logic 1, the I
2
C accesses to non-Atmel compatible devices
with the following
5.4 Optical Module Interface
2
C_DATA_0:9 output for
2
C access state
2
C
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