S9S12HZ128J3VAL Freescale Semiconductor, S9S12HZ128J3VAL Datasheet - Page 189

IC MCU FLASH 112-LQFP

S9S12HZ128J3VAL

Manufacturer Part Number
S9S12HZ128J3VAL
Description
IC MCU FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HZ128J3VAL

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
112-LQFP
Processor Series
S12HY
Core
HCS12X
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
1
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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5.4.6
The RTI can be used to generate a hardware interrupt at a fixed periodic rate. If enabled (by setting
RTIE=1), this interrupt will occur at the rate selected by the RTICTL register. The RTI runs with a gated
OSCCLK (see
RTIF flag is set to 1 and a new RTI time-out period starts immediately.
A write to the RTICTL register restarts the RTI time-out period.
If the PRE bit is set, the RTI will continue to run in pseudo-stop mode.
5.4.7
5.4.7.1
The CRG block behaves as described within this specification in all normal modes.
5.4.7.2
The VCO has a minimum operating frequency, f
to a failure or due to long crystal start-up time, the bus clock and the core clock are derived from the VCO
Freescale Semiconductor
Real-Time Interrupt (RTI)
Modes of Operation
Normal Mode
Self-Clock Mode
Section Figure 5-22., “Clock Chain for
gating condition
OSCCLK
= Clock Gate
STOP(PSTP,PRE),
WAIT(RTIWAI),
RTI enable
MC9S12HZ256 Data Sheet, Rev. 2.05
Figure 5-22. Clock Chain for RTI
2
2
2
2
2
2
SCM
1024
.
. If the external clock frequency is not available due
RTR[6:4]
0:1:0
0:0:1
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
RTI”). At the end of the RTI time-out period the
COUNTER (RTR[3:0])
4-BIT MODULUS
Chapter 5 Clocks and Reset Generator (CRGV4)
RTI TIMEOUT
189

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