S9S12HZ128J3VAL Freescale Semiconductor, S9S12HZ128J3VAL Datasheet - Page 299

• Manufacturer Part Number: S9S12HZ128J3VAL
• Description: IC MCU FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HZ128J3VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12HY
• Core: HCS12X
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 1
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3.2.4
Read: anytime
Write: anytime.
Freescale Semiconductor
l
ACLKS
Reset
MCZIF
AOVIF
FTST
Field
Field
1:0
4
7
0
W
R
MCZIF
Factory Test — This bit is reserved for factory test and reads zero in user mode.
Accumulator Sample Frequency Select — This field sets the accumulator sample frequency by pre-scaling
the bus frequency by a factor of 8, 16, 32, or 64. A faster sample frequency can provide more accurate results
but cause the accumulator to overflow. Best results are achieved with a frequency between 500 kHz and 2 MHz.
Modulus Counter Underflow Interrupt Flag — This flag is set when the modulus down-counter reaches
0x0000. If not masked (MCZIE = 1), a modulus counter underflow interrupt is pending while this flag is set. This
flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
Accumulator Overflow Interrupt Flag — This flag is set when the Integration Accumulator has a positive or
negative overflow. If not masked (AOVIE = 1), an accumulator overflow interrupt is pending while this flag is set.
This flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
Stepper Stall Detector Flag Register (SSDFLG)
0
7
A change in the accumulator sample frequency will not be effective until the
ITG bit is cleared.
= Unimplemented or Reserved
ACLKS
Figure 10-5. Stepper Stall Detector Flag Register (SSDFLG)
0
1
2
3
0
0
6
Table 10-8. SSDCTL Field Descriptions (continued)
Table 10-9. Accumulator Sample Frequency
Table 10-10. SSDFLG Field Descriptions
Frequency
f
f
f
f
BUS
BUS
BUS
Accumulator Sample Frequency = f
MC9S12HZ256 Data Sheet, Rev. 2.05
BUS
0
0
5
/ 16
/ 32
/ 64
/ 8
f
5.00 MHz
2.50 MHz
1.25 MHz
NOTE
BUS
625 kHz
0
0
4
MHz
= 40
Description
Description
f
3.12 MHz
1.56 MHz
781 kHz
391 kHz
BUS
0
0
3
MHz
BUS
= 25
/ (8 x 2
Chapter 10 Stepper Stall Detector (SSDV1)
0
0
2
2.00 MHz
1.00 MHz
f
ACLKS
500 kHz
250 kHz
BUS
MHz
= 16
)
0
0
1
AOVIF
0
0
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