S9S12HZ128J3VAL Freescale Semiconductor, S9S12HZ128J3VAL Datasheet - Page 266

• Manufacturer Part Number: S9S12HZ128J3VAL
• Description: IC MCU FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HZ128J3VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12HY
• Core: HCS12X
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 1
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 9 Motor Controller (MC10B8CV1)
9.3.2.2
This register controls the behavior of the analog section of the motor controller as well as the interrupt
enables.
266
.
Reset
RECIRC
MCTOIE
Field
7
0
W
R
RECIRC
0 Recirculation on the high side transistors. Active state for PWM output is logic low, the static channel will
1 Recirculation on the low side transistors. Active state for PWM output is logic high, the static channel will
0 Interrupt disabled.
1 Interrupt enabled. An interrupt will be generated when the motor controller timer counter overflow interrupt flag
Recirculation in (Dual) Full H-Bridge Mode (refer to
Motor Controller Timer Counter Overflow Interrupt Enable
Motor Controller Control Register 1
7
0
output logic high.
output logic low.
(MCTOIF) is set.
the outputs in (dual) full H-bridge modes. In half H-bridge mode, the PWM output is always active low.
RECIRC = 1 will also invert the effect of the S bits (refer to
H-bridge modes. RECIRC must be changed only while no PWM channel is operating in (dual) full H-bridge
mode; otherwise, erroneous output pattern may occur.
= Unimplemented or Reserved
Figure 9-4. Motor Controller Control Register 1 (MCCTL1)
6
0
0
Table 9-4. MCCTL1 Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
MCPRE[1:0]
5
0
0
Table 9-3. Prescaler Values
00
01
10
11
4
0
0
Description
Section 9.4.1.3.3, “RECIRC
f
f
f
Bus
Bus
Bus
f
f
Bus
TC
3
0
0
/2
/4
/8
Section 9.4.1.3.2, “Sign Bit
2
0
0
Bit”)— RECIRC only affects
Freescale Semiconductor
(S)”) in (dual) full
1
0
0
MCTOIE
0
0