S9S12HZ128J3VAL Freescale Semiconductor, S9S12HZ128J3VAL Datasheet - Page 300

IC MCU FLASH 112-LQFP

S9S12HZ128J3VAL

Manufacturer Part Number
S9S12HZ128J3VAL
Description
IC MCU FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HZ128J3VAL

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
112-LQFP
Processor Series
S12HY
Core
HCS12X
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
1
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 10 Stepper Stall Detector (SSDV1)
10.3.2.5
Read: anytime
Write: anytime.
If the RDMCL bit in the MDCCTL register is cleared, reads of the MDCCNT register will return the
present value of the count register. If the RDMCL bit is set, reads of the MDCCNT register will return the
contents of the load register.
With a 0x0000 write to the MDCCNT register, the modulus counter stays at zero and does not set the
MCZIF flag in the SSDFLG register.
If modulus mode is not enabled (MODMC = 0), a write to the MDCCNT register immediately updates the
load register and the counter register with the value written to it. The modulus counter will count down
from this value and will stop at 0x0000.
If modulus mode is enabled (MODMC = 1), a write to the MDCCNT register updates the load register with
the value written to it. The count register will not be updated with the new value until the next counter
underflow. The FLMC bit in the MDCCTL register can be used to immediately update the count register
with the new value if an immediate load is desired.
The modulus down counter clock frequency is the bus frequency divided by 64 or 512.
300
Reset
Reset
W
W
R
R
Modulus Down-Counter Count Register (MDCCNT)
15
1
1
7
A separate read/write for high byte and low byte gives a different result than
accessing the register as a word.
Figure 10-6. Modulus Down-Counter Count Register High (MDCCNT)
Figure 10-7. Modulus Down-Counter Count Register Low (MDCCNT)
14
1
1
6
MC9S12HZ256 Data Sheet, Rev. 2.05
13
1
1
5
NOTE
12
1
1
4
MDCCNT
MDCCNT
11
1
1
3
10
1
1
2
Freescale Semiconductor
1
1
9
1
1
1
8
0

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