MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1138
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PCI Express Interface Controller
18.3.10.13 LTSSM State Status Register—0x404
The PCI Express link training and status state machine (LTSSM) state status register, shown in
Figure
debugging link training failures.
The fields of the PCI Express LTSSM state status register are described in
Table 18-109
18-90
Offset 0x404
Reset
Status Code
31–7
W
Bits
6–0
R
(Hex)
18-114, provides detailed information about link training status. This register is useful for
0C
0D
0A
0B
00
01
02
03
04
05
06
07
08
09
31
Status code Status code. See
Name
provides the encodings for the status code field of the PEX_LTSSM_STAT register.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 18-114. PCI Express LTSSM State Status Register (PEX_LTSSM_STAT)
—
Detect quiet
Detect active (0)
Detect active (1)
Detect active (2)
Polling active (0)
Polling active (1)
Polling config (0)
Polling config (1)
Polling compliance
Configuration link width start (0)
Configuration link width start (1)
Configuration link width accept (0)
Configuration link width accept (1)
Configuration lane number wait (0)
Reserved
LTSSM State Description
Table 18-108. PEX_LTSSM_STAT Field Descriptions
Table 18-109. PEX_LTSSM_STAT Status Codes
Table 18-109
—
for encodings.
All zeros
Status Code
Description
(Hex)
2C
2D
27
28
29
2A
2B
2E
2F
30
31
32
33
34
TX L0s FTS; RX L0s FTS
L0 to L1 (0)
L0 to L1 (1)
L1 entry
L1 idle (0)
L1 idle (1)
L0 to L2 (0)
L0 to L2 (1)
L2 entry
L2 idle (0)
L2 idle (1)
Recovery lock (0)
Recovery lock (1)
Recovery lock (2)
LTSSM State Description
Table
7
18-108.
6
Freescale Semiconductor
Access: Read-only
Status Code
0
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