MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1278
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Quantity:
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Manufacturer:
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Complete List of Configuration, Control, and Status Registers
B-20
0x2_45C0–
0x2_45AC
0x2_45BC
0x2_454C
0x2_455C
0x2_456C
0x2_457C
0x2_458C
0x2_459C
0x2_467C
0x2_4548
0x2_4550
0x2_4554
0x2_4558
0x2_4560
0x2_4564
0x2_4568
0x2_4570
0x2_4574
0x2_4578
0x2_4580
0x2_4584
0x2_4588
0x2_4590
0x2_4594
0x2_4598
0x2_45A0
0x2_45A4
0x2_45A8
0x2_45B0
0x2_45B4
0x2_45B8
0x2_4680
0x2_4684
0x2_4688
Offset
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
MAC01ADDR1*—MAC exact match address 1, part 1
MAC01ADDR2*—MAC exact match address 1, part 2
MAC02ADDR1*—MAC exact match address 2, part 1
MAC02ADDR2*—MAC exact match address 2, part 2
MAC03ADDR1*—MAC exact match address 3, part 1
MAC03ADDR2*—MAC exact match address 3, part 2
MAC04ADDR1*—MAC exact match address 4, part 1
MAC04ADDR2*—MAC exact match address 4, part 2
MAC05ADDR1*—MAC exact match address 5, part 1
MAC05ADDR2*—MAC exact match address 5, part 2
MAC06ADDR1*—MAC exact match address 6, part 1
MAC06ADDR2*—MAC exact match address 6, part 2
MAC07ADDR1*—MAC exact match address 7, part 1
MAC07ADDR2*—MAC exact match address 7, part 2
MAC08ADDR1*—MAC exact match address 8, part 1
MAC08ADDR2*—MAC exact match address 8, part 2
MAC09ADDR1*—MAC exact match address 9, part 1
MAC09ADDR2*—MAC exact match address 9, part 2
MAC10ADDR1*—MAC exact match address 10, part 1
MAC10ADDR2*—MAC exact match address 10, part 2
MAC11ADDR1*—MAC exact match address 11, part 1
MAC11ADDR2*—MAC exact match address 11, part 2
MAC12ADDR1*—MAC exact match address 12, part 1
MAC12ADDR2*—MAC exact match address 12, part 2
MAC13ADDR1*—MAC exact match address 13, part 1
MAC13ADDR2*—MAC exact match address 13, part 2
MAC14ADDR1*—MAC exact match address 14, part 1
MAC14ADDR2*—MAC exact match address 14, part 2
MAC15ADDR1*—MAC exact match address 15, part 1
MAC15ADDR2*—MAC exact match address 15, part 2
Reserved
TR64—Transmit and receive 64-byte frame counter
TR127—Transmit and receive 65- to 127-byte frame counter
TR255—Transmit and receive 128- to 255-byte frame counter
Table B-1. Memory Map (continued)
eTSEC Transmit and Receive Counters
Register
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
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