MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 17

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

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10.4.3
10.4.4
10.4.5
10.4.6
10.4.7
10.4.8
10.5
10.5.1
10.5.1.1
10.5.1.2
11.1
11.1.1
11.1.2
11.1.3
11.2
11.2.1
11.2.2
11.3
11.3.1
11.3.1.1
11.3.1.2
11.3.1.3
11.3.1.4
11.3.1.5
11.3.1.6
11.4
11.4.1
11.4.1.1
11.4.1.2
11.4.1.3
11.4.1.4
11.4.1.5
11.4.1.5.1
11.4.1.5.2
11.4.1.6
11.4.2
11.4.2.1
Freescale Semiconductor
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Initialization/Application Information ......................................................................... 10-52
Introduction.................................................................................................................... 11-1
External Signal Descriptions ......................................................................................... 11-3
Memory Map/Register Definition ................................................................................. 11-4
Functional Description..................................................................................................11-11
Spurious Vector Generation ..................................................................................... 10-50
Messaging Interrupts................................................................................................ 10-50
Shared Message Signaled Interrupts........................................................................ 10-50
PCI Express INTx.................................................................................................... 10-51
Global Timers .......................................................................................................... 10-51
Reset of the PIC ....................................................................................................... 10-52
Programming Guidelines ......................................................................................... 10-52
Overview.................................................................................................................... 11-2
Features...................................................................................................................... 11-2
Modes of Operation ................................................................................................... 11-2
Signal Overview ........................................................................................................ 11-3
Detailed Signal Descriptions ..................................................................................... 11-3
Register Descriptions................................................................................................. 11-5
Transaction Protocol .................................................................................................11-11
Arbitration Procedure .............................................................................................. 11-15
PIC Registers ....................................................................................................... 10-53
Changing Interrupt Source Configuration ........................................................... 10-54
I
I
I
I
I
Digital Filter Sampling Rate Register (I2CDFSRR) ............................................11-11
START Condition ................................................................................................ 11-12
Slave Address Transmission ................................................................................ 11-12
Repeated START Condition ................................................................................ 11-13
STOP Condition................................................................................................... 11-13
Protocol Implementation Details ......................................................................... 11-14
Address Compare—Implementation Details ....................................................... 11-15
Arbitration Control .............................................................................................. 11-15
2
2
2
2
2
C Address Register (I2CADR) ........................................................................... 11-6
C Frequency Divider Register (I2CFDR)........................................................... 11-6
C Control Register (I2CCR) ............................................................................... 11-7
C Status Register (I2CSR) .................................................................................. 11-9
C Data Register (I2CDR).................................................................................. 11-10
Transaction Monitoring—Implementation Details.......................................... 11-14
Control Transfer—Implementation Details ..................................................... 11-14
Contents
I
2
Chapter 11
C Interfaces
Title
Number
Page
xvii