MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 36

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

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Number
17.4.2.8.1
17.4.2.8.2
17.4.2.9
17.4.2.10
17.4.2.11
17.4.2.11.1
17.4.2.11.2
17.4.2.11.3
17.4.2.11.4
17.4.2.11.5
17.4.2.12
17.4.2.12.1
17.4.2.12.2
17.4.2.13
17.4.2.13.1
17.4.2.13.2
17.5
17.5.1
17.5.1.1
17.5.1.2
17.5.1.3
17.5.2
17.5.2.1
18.1
18.1.1
18.1.1.1
18.1.1.2
18.1.2
18.1.3
18.1.3.1
18.1.3.2
18.2
18.3
18.3.1
18.3.2
18.3.2.1
18.3.2.2
xxxvi
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Initialization/Application Information ......................................................................... 17-67
Introduction.................................................................................................................... 18-1
External Signal Descriptions ......................................................................................... 18-4
Memory Map/Register Definitions ................................................................................ 18-5
Power-On Reset Configuration Modes.................................................................... 17-67
Byte Ordering .......................................................................................................... 17-69
Overview.................................................................................................................... 18-1
Features...................................................................................................................... 18-3
Modes of Operation ................................................................................................... 18-4
PCI Express Memory Mapped Registers................................................................... 18-5
PCI Express Configuration Access Registers............................................................ 18-9
Fast Back-to-Back Transactions .......................................................................... 17-56
Dual Address Cycles............................................................................................ 17-56
Configuration Cycles ........................................................................................... 17-58
Other Bus Transactions........................................................................................ 17-63
PCI Error Functions............................................................................................. 17-65
Host Mode ........................................................................................................... 17-68
Agent Mode ......................................................................................................... 17-68
Agent Configuration Lock Mode......................................................................... 17-68
Byte Order for Configuration Transactions ......................................................... 17-70
Outbound Transactions .......................................................................................... 18-2
Inbound Transactions............................................................................................. 18-3
Root Complex/Endpoint Modes ............................................................................ 18-4
Link Width ............................................................................................................. 18-4
PCI Express Configuration Address Register (PEX_CONFIG_ADDR) .............. 18-9
PCI Express Configuration Data Register (PEX_CONFIG_DATA)................... 18-10
Master-Initiated Termination ........................................................................... 17-52
Target-Initiated Termination ............................................................................ 17-53
PCI Configuration Space Header .................................................................... 17-58
Host Accessing the PCI Configuration Space ................................................. 17-60
Agent Accessing the PCI Configuration Space ............................................... 17-61
PCI Type 0 Configuration Translation............................................................. 17-62
Type 1 Configuration Translation.................................................................... 17-63
Interrupt-Acknowledge Transactions .............................................................. 17-63
Special-Cycle Transactions ............................................................................. 17-64
PCI Parity ........................................................................................................ 17-65
Error Reporting................................................................................................ 17-66
PCI Express Interface Controller
Contents
Chapter 18
Title
Freescale Semiconductor
Number
Page