PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 10

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

List of Figures
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Data Sheet
Receive Line Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Protection Switching Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Jitter Attenuation Performance (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . 127
Jitter Tolerance (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
The Receive Elastic Buffer as Circularly Organized Memory . . . . . . 133
Automatic Handling of Errored Signaling Units . . . . . . . . . . . . . . . . . 136
Influences on Synchronization Status (T1/J1) . . . . . . . . . . . . . . . . . . 141
Transmitter Configuration (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Clocking in Remote Loop Configuration (T1/J1) . . . . . . . . . . . . . . . . 156
Transmit Clock System (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Transmit Line Monitor Configuration (T1/J1) . . . . . . . . . . . . . . . . . . . 160
System Interface (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Receive System Interface Clocking (T1/J1) . . . . . . . . . . . . . . . . . . . . 167
SYPR Offset Programming (1.544 Mbit/s, 1.544 MHz) . . . . . . . . . . . 169
SYPR Offset Programming (6.176 Mbit/s, 6.176 MHz) . . . . . . . . . . . 169
RFM Offset Programming (1.544 Mbit/s, 1.544 MHz) . . . . . . . . . . . . 170
RFM Offset Programming (6.176 Mbit/s, 6.176 MHz) . . . . . . . . . . . . 170
2.048 MHz Receive Signaling Highway (T1/J1). . . . . . . . . . . . . . . . . 171
Receive FS/DL-Bits in Time Slot 0 on RDO (T1/J1) . . . . . . . . . . . . . 171
1.544 MHz Receive Signaling Highway (T1/J1). . . . . . . . . . . . . . . . . 172
Transmit System Clocking: 1.544 MHz (T1/J1) . . . . . . . . . . . . . . . . . 173
Transmit System Clocking: 8.192 MHz/4.096 Mbit/s (T1/J1) . . . . . . . 174
2.048 MHz Transmit Signaling Clocking (T1/J1) . . . . . . . . . . . . . . . . 175
1.544 MHz Transmit Signaling Highway (T1/J1) . . . . . . . . . . . . . . . . 175
Signaling Marker for CAS/CAS-CC Applications (T1/J1) . . . . . . . . . . 176
Signaling Marker for CAS-BR Applications (T1/J1) . . . . . . . . . . . . . . 177
Transmit FS/DL Bits on XDI (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . 178
SYPX Offset Programming (1.544 Mbit/s, 1.544 MHz) . . . . . . . . . . . 179
SYPX Offset Programming (6.176 Mbit/s, 6.176 MHz) . . . . . . . . . . . 179
Remote Loop (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Payload Loop (T1/J1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
Local Loop (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
Channel Loop-Back (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
HDLC Receive Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
HDLC Transmit Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
Interrupt Driven Data Transmission (flow diagram) . . . . . . . . . . . . . . 207
Interrupt Driven Transmission Example . . . . . . . . . . . . . . . . . . . . . . . 207
Interrupt Driven Reception Sequence Example . . . . . . . . . . . . . . . . . 208
MCLK Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450
JTAG Boundary Scan Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451
Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 452
Intel Non-Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . . . . . 453
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FALC56 V1.2
PEB 2256
2002-08-27
Page