PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 321

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

XDU3
RPF3
Global Interrupt Status Register (Read)
Value after reset: 00
GIS
This status register points to pending interrupts sourced by ISR(5:0).
Data Sheet
7
Transmit Data Underrun - HDLC Channel 3
Transmitted frame was terminated with an abort sequence because
no data was available for transmission in XFIFO3 and no XME3 was
issued.
Note: Transmitter and XFIFO3 are reset and deactivated if this
Receive Pool Full - HDLC Channel 3
32 bytes of a frame have arrived in the receive FIFO3. The frame is
not yet completely received.
H
condition occurs. They are reactivated not before this interrupt
status register has been read. Thus, XDU3 should not be
masked via register IMR5.
ISR5
ISR4
321
ISR3
ISR2
ISR1
FALC56 V1.2
ISR0
E1 Registers
0
PEB 2256
2002-08-27
(6E)