PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 403
PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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EO1(1:0)
EO2(1:0)
EO3(1:0)
Time Slot Bit Select 1 (Read/Write)
Value after reset: FF
TSBS1
TSB1(7:0) =
Data Sheet
TSB17
7
Even/Odd frame selection - HDLC Channel 1
Channel 1 HDLC protocol data can be sent in even, odd or both
frames of a multiframe.
00 = Even and odd frames
01 = Odd frames only
10 = Even frames only
11 = Undefined
Even/Odd frame selection - HDLC Channel 2
Channel 2 HDLC protocol data can be sent in even, odd or both
frames of a multiframe.
00 = Even and odd frames
01 = Odd frames only
10 = Even frames only
11 = Undefined
Even/Odd frame selection - HDLC Channel 3
Channel 3 HDLC protocol data can be sent in even, odd or both
frames of a multiframe.
00 = Even and odd frames
01 = Odd frames only
10 = Even frames only
11 = Undefined
TSB16
Time Slot Bit Selection - HDLC Channel 1
Only bits selected by this register are used for HDLC channel 1 in
selected time slots. Time slot selection is done by setting the
appropriate bits in registers TTR(4:1) and RTR(4:1) independently
for receive and transmit direction. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot(s) are enabled.
TSB1x = 0 to bit position x in selected time slot(s) is not used for
HDLC channel 1 reception and transmission.
H
TSB15
TSB14
403
TSB13
TSB12
TSB11
T1/J1 Registers
TSB10
FALC56 V1.2
0
PEB 2256
2002-08-27
(A1)
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